System Instructions
Environment interaction
There are two instructions to interact with the operating system:
- ecall for system calls
- ebreak for calling a debugger
Control and Status Registers (CSRs)
Control and Status Registers (CSRs) provide a general facility for system control and I/O. There is a CSR address space for up to 212 registers.
The instructions to modify CSRs are:
instr using rs1 | instr using imm | description |
---|---|---|
csrrw rd, csr, rs1 | csrrwi rd, csr, imm | atomically copy a value from csr to rd and overwrite csr with the value in rs1 or imm |
csrrc rd, csr, rs1 | csrrci rd, csr, imm | atomically copy a value from csr to rd and clear bits in csr 1 |
csrrs rd, csr, rs1 | csrrsi rd, csr, imm | atomically copy a value from csr to rd and set bits in a csr 1 |
Note: csrrs x1, csr, x0
can be used to read from csr
without modifying it.
It is abbreviated as a pseudoinstruciton csrr rd, csr.
Mandatory user-readable CSRs
CSR | at | description |
---|---|---|
cycle | 0xC00 | cycle counter |
cycleh | 0xC80 | upper 32 bit of cycle counter |
time | 0xC01 | real-time clock |
timeh | 0xC81 | upper 32 bit of real-time clock |
instret | 0xC02 | instructions retired counter |
instreth | 0xC82 | upper 32 bit of instret |
Encoding
All of the following are in I-format:
imm[11:0] | rs1 | funct3 | rd | opcode | |
---|---|---|---|---|---|
ecall | 0000 0000 0000 | 00000 | 000 | 00000 | 11 100 11 |
ebreak | 0000 0000 0001 | 00000 | 000 | 00000 | 11 100 11 |
csrrw | 001 | 11 100 11 | |||
csrrs | 010 | 11 100 11 | |||
csrrc | 011 | 11 100 11 | |||
csrrwi | 101 | 11 100 11 | |||
csrrci | 110 | 11 100 11 | |||
csrrsi | 111 | 11 100 11 |
1 TODO: according to the mask in rs1/imm ?